CVE-2023-41052
Vyperlang Vyper ≤ 0.3.9
Raw vector
CVSS:3.1/AV:N/AC:H/PR:N/UI:N/S:U/C:N/I:L/A:NCVSS and EPSS are reproduced from their sources (NVD, FIRST EPSS). Risk Priority is our own derived reading, not an NVD score.
Summary
CVE-2023-41052 is a low-severity Always-Incorrect Control Flow Implementation (CWE-670) vulnerability in Vyperlang Vyper. Its CVSS base score is 3.7 (Low).
Operationally, ranked at the 44th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog; a public proof-of-concept is referenced.
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2023-0267
Vulnerability Data
Vyper is a Pythonic Smart Contract Language. In affected versions the order of evaluation of the arguments of the builtin functions `uint256_addmod`, `uint256_mulmod`, `ecadd` and `ecmul` does not follow source order. This behaviour is problematic when the evaluation of one…
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of the arguments produces side effects that other arguments depend on. A patch is currently being developed on pull request #3583. When using builtins from the list above, users should make sure that the arguments of the expression do not produce side effects or, if one does, that no other argument is dependent on those side effects.
- CWE(s)
Related Threats
CVEs Like This One
Affected Assets
Mitigating Controls
Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.
A.8.25 mandates an SDLC process that includes security requirements, checkpoints, secure coding guidelines, testing and developer training, which reaches a slice of control-flow defects but leaves most implementation bugs untouched without perfect enforcement at every checkpoint.
Secure coding standards and reviews directly target flawed control-flow implementations.
Security testing in development and acceptance can detect paths that deviate from intended logic.
A.8.32 mandates a formal process for planning, authorizing, testing and documenting changes but does not itself inspect, correct or block the incorrect control-flow logic that CWE-670 describes; the defect can still be introduced and exploited if the developer writes it and the process accepts it.
Hardening callouts derived
DISA STIG baselines are authored against specific weaknesses. Where this CVE cites a broad weakness class, the mapping is not asserted at that abstraction (owner ruling, 2026-09-25: grade only at Base and below), so no rule is shown here rather than a rule shown against the wrong grain.
- No fine-grained STIG row for CWE-670, a class-level weakness, and none of its children carries one either.