Cyber Resilience

CVE-2024-0108

Nvidia Jetson Linux ≤ 32.7.5

Published
08 August 2024
Modified
16 September 2024
Patch / advisory
CVSS Score v3.1 8.7
Click a component to see what it means
Raw vectorCVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:L
EPSS Score 0.0023 14th percentile
Risk Priority 59 floored blend · peak EPSS

Summary

CVE-2024-0108 is a high-severity Improper Handling of Exceptional Conditions (CWE-755) vulnerability in Nvidia Jetson Nano. Its CVSS base score is 8.7 (High).

Operationally, exploitation aligns with the MITRE ATT&CK technique Exploitation for Client Execution (T1203); ranked at the 14th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SC-24 (Fail in Known State) and SI-17 (Fail-safe Procedures) — see the control section below for these in your framework.

OWASP Top 10 for Web (2025)

EU & UK References

Vulnerability Data

NVIDIA Jetson Linux contains a vulnerability in NvGPU where error handling paths in GPU MMU mapping code fail to clean up a failed mapping attempt. A successful exploit of this vulnerability may lead to denial of service, code execution, and…

more

escalation of privileges.

CWE(s)

Related Threats

MITRE ATT&CK Enterprise Techniques

T1203 Exploitation for Client Execution Execution
Adversaries may exploit software vulnerabilities in client applications to execute code.
T1489 Service Stop Impact
Adversaries may stop or disable services on a system to render those services unavailable to legitimate users.
T1499 Endpoint Denial of Service Impact
Adversaries may perform Endpoint Denial of Service (DoS) attacks to degrade or block the availability of services to users.
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2023-0204Same vendor: Nvidia
CVE-2023-25520Same product: Nvidia Jetson Agx Xavier
CVE-2024-37284Shared CWE-755
CVE-2024-47489Shared CWE-755
CVE-2025-33197Same vendor: Nvidia
CVE-2025-9437Shared CWE-755
CVE-2023-45820Shared CWE-755
CVE-2024-45038Shared CWE-755
CVE-2023-21408Shared CWE-755
CVE-2023-27595Shared CWE-755

Affected Assets

nvidia
jetson linux
≤ 32.7.5

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

Detect
Catch it (NIST detect / respond)

Harden
Shrink the surface (DISA STIG)
  • 1 hardening rule · 1 OS baseline
Validate
Prove the fix (OWASP ASVS)

Mitigating Controls (NIST 800-53 r5) AI

Requires the system to fail to a known safe state on specified failures, limiting the impact of unhandled exceptional conditions.

Mandates explicit fail-safe procedures triggered by indicated failures, structurally preventing unhandled or mishandled exceptional conditions.

Requires generation of appropriate error messages on exceptional conditions, directly enforcing correct handling rather than silent or incorrect behavior.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure SDLC practices explicitly require proper exception and error handling during design and coding.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

finds

Security testing in development and acceptance verifies correct handling of exceptional conditions.

degrades

Documented operating procedures may specify exception handling but do not guarantee implementation.

A.8.15 Logging partial match
finds

Logging captures unhandled exceptions, aiding detection but not preventing the weakness.

finds

Monitoring can surface unhandled exceptions but does not enforce proper handling.

prevents

Secure SDLC mandates exception-handling requirements and testing that directly prevent improper handling of exceptional conditions.

prevents

Application security requirements explicitly include handling of error and exceptional conditions.

References