CVE-2024-6657
Raw vector
CVSS:3.1/AV:A/AC:L/PR:N/UI:N/S:U/C:N/I:N/A:HSummary
CVE-2024-6657 is a medium-severity Incorrect Synchronization (CWE-821) vulnerability in Silabs (inferred from references). Its CVSS base score is 6.5 (Medium).
Operationally, exploitation aligns with the MITRE ATT&CK technique Exploitation for Privilege Escalation (T1068); ranked at the 10th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.
The strongest mitigations our analysis identified map to SC-4 (Information in Shared System Resources) — see the control section below for these in your framework.
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2024-47714
Vulnerability Data
A denial of service may be caused to a single peripheral device in a BLE network when multiple central devices continuously connect and disconnect to the peripheral. A hard reset is required to recover the peripheral device.
- CWE(s)
Related Threats
MITRE ATT&CK Enterprise Techniques
CVEs Like This One
Affected Assets
Mitigating Controls
Mitigating Controls (NIST 800-53 r5) AI
SC-4 directly requires preventing unintended information transfer through shared resources, structurally blocking the concurrent unsynchronized access described by CWE-821.
Mitigating Controls (NIST CSF 2.0) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.
Secure SDLC practices directly require correct concurrency controls and synchronization primitives to prevent race conditions.
Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.
Security testing can detect synchronization flaws before production deployment.
Secure SDLC practices include concurrency and synchronization requirements that reduce race conditions.
Application security requirements can mandate proper locking and thread-safety controls.
Secure architecture principles address concurrent access and resource synchronization.
Secure coding standards directly require correct synchronization primitives and thread-safety.
Change management processes can introduce or miss synchronization fixes during updates.