Cyber Resilience

CVE-2025-20067

Published
12 August 2025
Modified
17 June 2026
CVSS Score v4 6.8
Click a component to see what it means
Raw vectorCVSS:4.0/AV:L/AC:L/AT:P/PR:H/UI:N/VC:H/VI:N/VA:N/SC:H/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
EPSS Score 0.0016 6th percentile
Risk Priority 23 floored blend · peak EPSS

Summary

CVE-2025-20067 is a medium-severity Observable Timing Discrepancy (CWE-208) vulnerability in Intel (inferred from references). Its CVSS base score is 6.8 (Medium).

Operationally, exploitation aligns with the MITRE ATT&CK technique Password Guessing (T1110.001); ranked at the 6th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SA-11 (Developer Testing and Evaluation) and SA-8 (Security and Privacy Engineering Principles) — see the control section below for these in your framework.

EU & UK References

Vulnerability Data

Observable timing discrepancy in firmware for some Intel(R) CSME and Intel(R) SPS may allow a privileged user to potentially enable information disclosure via local access.

CWE(s)
CWE-208

Related Threats

MITRE ATT&CK Enterprise Techniques

T1110.001 Password Guessing Credential Access
Adversaries with no prior knowledge of legitimate credentials within the system or environment may guess passwords to attempt access to accounts.
attack.mitre.org →
T1087 Account Discovery Discovery
Adversaries may attempt to get a listing of valid accounts, usernames, or email addresses on a system or within a compromised environment.
attack.mitre.org →
T1087.001 Local Account Discovery
Adversaries may attempt to get a listing of local system accounts.
attack.mitre.org →
T1087.002 Domain Account Discovery
Adversaries may attempt to get a listing of domain accounts.
attack.mitre.org →
T1087.003 Email Account Discovery
Adversaries may attempt to get a listing of email addresses and accounts.
attack.mitre.org →
T1087.004 Cloud Account Discovery
Adversaries may attempt to get a listing of cloud accounts.
attack.mitre.org →
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2026-23892Shared CWE-208
CVE-2026-40263Shared CWE-208
CVE-2026-43606Shared CWE-208
CVE-2024-41828Shared CWE-208
CVE-2026-40972Shared CWE-208
CVE-2026-5086Shared CWE-208
CVE-2026-13758Shared CWE-208
CVE-2024-52307Shared CWE-208
CVE-2025-59350Shared CWE-208
CVE-2025-43754Shared CWE-208

Affected Assets

Intel
—
inferred from references and description; NVD did not file a CPE for this CVE

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

—

Detect
Catch it (NIST detect / respond)

—

Harden
Shrink the surface (DISA STIG)

—

Validate
Prove the fix (OWASP ASVS)
  • V11.2.4

Mitigating Controls (NIST 800-53 r5) AI

SA-11 Developer Testing and Evaluation good match

Developer testing can include timing analysis or side-channel test cases that reveal observable timing discrepancies.

SA-8 Security and Privacy Engineering Principles partial match

Engineering principles can mandate constant-time algorithms and side-channel resistance so timing discrepancies are never introduced.

SC-13 Cryptographic Protection partial match

Requiring approved cryptographic modules and algorithms implicitly demands implementations free of observable timing leaks.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure SDLC practices directly require constant-time implementations that eliminate observable timing discrepancies.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

A.8.17 Clock synchronization none match
none

Consistent reference clocks limit the attacker's ability to measure or manipulate timing differences that could reveal internal state or processing paths.

References