Cyber Resilience

CVE-2025-58143

Race Condition in Xen 4.13.0 – 4.17.0

Race Condition
Published
11 September 2025
Modified
04 November 2025
Patch / advisory
View advisory
CVSS Score v3.1 9.8
Click a component to see what it means
Raw vectorCVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
EPSS Score 0.0037 29th percentile
Risk Priority 71 floored blend · peak EPSS

Summary

CVE-2025-58143 is a critical-severity Race Condition within a Thread (CWE-366) vulnerability in Xen Xen. Its CVSS base score is 9.8 (Critical).

Operationally, exploitation aligns with the MITRE ATT&CK technique Exploitation for Privilege Escalation (T1068); ranked at the 29th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SA-11 (Developer Testing and Evaluation) and SA-15 (Development Process, Standards, and Tools) — see the control section below for these in your framework.

EU & UK References

Vulnerability Data

[This CNA information record relates to multiple CVEs; the text explains which aspects/vulnerabilities correspond to which CVE.] There are multiple issues related to the handling and accessing of guest memory pages in the viridian code: 1. A NULL pointer dereference…

more

in the updating of the reference TSC area. This is CVE-2025-27466. 2. A NULL pointer dereference by assuming the SIM page is mapped when a synthetic timer message has to be delivered. This is CVE-2025-58142. 3. A race in the mapping of the reference TSC page, where a guest can get Xen to free a page while still present in the guest physical to machine (p2m) page tables. This is CVE-2025-58143.

CWE(s)
CWE-366

Related Threats

MITRE ATT&CK Enterprise Techniques

T1068 Exploitation for Privilege Escalation Privilege Escalation
Adversaries may exploit software vulnerabilities in an attempt to elevate privileges.
attack.mitre.org →
T1548 Abuse Elevation Control Mechanism Privilege Escalation
Adversaries may circumvent mechanisms designed to control privilege elevation to gain higher-level permissions.
attack.mitre.org →
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2024-45818Same product: Xen Xen
CVE-2026-23558Same product: Xen Xen
CVE-2025-58145Same product: Xen Xen
CVE-2023-34322Same product: Xen Xen
CVE-2026-23554Same product: Xen Xen
CVE-2025-58149Same product: Xen Xen
CVE-2023-34326Same product: Xen Xen
CVE-2023-46837Same product: Xen Xen
CVE-2023-34321Same product: Xen Xen
CVE-2025-58147Same product: Xen Xen

Affected Assets

xen
xen
4.13.0 — 4.17.0

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

—

Detect
Catch it (NIST detect / respond)

—

Harden
Shrink the surface (DISA STIG)

—

Validate
Prove the fix (OWASP ASVS)
  • V15.4.2
  • V15.4.3
  • V17.2.6

Mitigating Controls (NIST 800-53 r5) AI

SA-11 Developer Testing and Evaluation good match

Developer testing and evaluation can include concurrency and stress testing that finds race conditions after they have been coded.

SA-15 Development Process, Standards, and Tools partial match

Requiring documented development standards and tools can mandate use of safe concurrency patterns that avoid introducing races.

SA-8 Security and Privacy Engineering Principles partial match

Security engineering principles include requirements for synchronization primitives and thread-safe design that stop race conditions from being introduced.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure SDLC practices directly require synchronization primitives and concurrency analysis that prevent intra-thread race conditions.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

A.8.29 Security testing in development and acceptance mostly match
finds

Security testing can detect race conditions through concurrency and stress testing.

A.8.25 Secure development life cycle partial match
prevents

Secure development lifecycle includes concurrency and synchronization practices that reduce race conditions.

A.8.26 Application security requirements partial match
prevents

Application security requirements can mandate thread-safety and locking controls.

A.8.27 Secure system architecture and engineering principles partial match
prevents

Secure architecture principles address concurrent access and resource synchronization.

A.8.28 Secure coding partial match
prevents

Secure coding standards directly require proper synchronization primitives to prevent race conditions.

A.8.32 Change management none match
none

Change management can introduce or remove synchronization flaws during updates.

References