Cyber Resilience

CVE-2023-20575

Amd Epyc 7251 Firmware

Published
11 July 2023
Modified
27 November 2024
Patch / advisory
View advisory
CVSS Score v3.1 6.5
Click a component to see what it means
Raw vectorCVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N
EPSS Score 0.0080 53th percentile
Risk Priority 52 floored blend · peak EPSS

Summary

CVE-2023-20575 is a medium-severity Observable Discrepancy (CWE-203) vulnerability in Amd Epyc 7251 Firmware. Its CVSS base score is 6.5 (Medium).

Operationally, exploitation aligns with the MITRE ATT&CK technique Account Discovery (T1087); ranked in the top 47% of CVEs by exploit likelihood; it is not currently listed in the CISA KEV catalog.

EU & UK References

Vulnerability Data

A potential power side-channel vulnerability in some AMD processors may allow an authenticated attacker to use the power reporting functionality to monitor a program’s execution inside an AMD SEV VM potentially resulting in a leak of sensitive information.

CWE(s)
CWE-203

Related Threats

MITRE ATT&CK Enterprise Techniques

T1087 Account Discovery Discovery
Adversaries may attempt to get a listing of valid accounts, usernames, or email addresses on a system or within a compromised environment.
attack.mitre.org →
T1110 Brute Force Credential Access
Adversaries may use brute force techniques to gain access to accounts when passwords are unknown or when password hashes are obtained.
attack.mitre.org →
T1595 Active Scanning Reconnaissance
Adversaries may execute active reconnaissance scans to gather information that can be used during targeting.
attack.mitre.org →
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2023-20583Same vendor: Amd
CVE-2023-20578Same product: Amd Epyc 7232P
CVE-2023-20569Same product: Amd Epyc 72F3
CVE-2023-20520Same product: Amd Epyc 7232P
CVE-2023-20592Same product: Amd Epyc 7232P
CVE-2023-20527Same product: Amd Epyc 7232P
CVE-2023-20526Same product: Amd Epyc 7232P
CVE-2023-20524Same product: Amd Epyc 7232P
CVE-2023-20529Same product: Amd Epyc 7232P
CVE-2023-20525Same product: Amd Epyc 7232P

Affected Assets

amd
epyc 7251 firmware
all versions
amd
epyc 7281 firmware
all versions
amd
epyc 7301 firmware
all versions
amd
epyc 7351 firmware
all versions
amd
epyc 7351p firmware
all versions
amd
epyc 7401 firmware
all versions
amd
epyc 7401p firmware
all versions
amd
epyc 7451 firmware
all versions
amd
epyc 7501 firmware
all versions
amd
epyc 7551 firmware
all versions
+78 more product configuration(s) — see NVD for full list

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

—

Detect
Catch it (NIST detect / respond)

—

Harden
Shrink the surface (DISA STIG)
  • 1 hardening rule · 1 OS baseline
Validate
Prove the fix (OWASP ASVS)

—

Likely Mitigating Controls AI

Per-CVE control mapping for this CVE has not run yet; the list below is derived from the weakness types (CWEs) cited in the NVD entry.

SC-30 Concealment and Misdirection
addresses: CWE-203

Misdirection can normalize or falsify responses to eliminate observable discrepancies that aid reconnaissance.

SC-31 Covert Channel Analysis
addresses: CWE-203

Observable discrepancies in system behavior can be modulated to create covert storage or timing channels; the required analysis detects and constrains such avenues.

SI-11 Error Handling
addresses: CWE-203

Prevents attackers from using observable differences in error responses to infer internal system details or state.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure SDLC practices directly prevent observable response discrepancies via consistent error handling and timing.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

A.8.17 Clock synchronization none match
none

Accurate, synchronized timestamps reduce observable timing discrepancies that an attacker could exploit to infer sensitive information or distinguish between success and failure paths.

References