Raw vector
CVSS:3.1/AV:N/AC:H/PR:H/UI:N/S:U/C:N/I:H/A:NCVSS and EPSS are reproduced from their sources (NVD, FIRST EPSS). Risk Priority is our own derived reading, not an NVD score.
Summary
CVE-2023-3218 is a medium-severity Race Condition within a Thread (CWE-366) vulnerability in It-Novum Openitcockpit. Its CVSS base score is 4.4 (Medium).
Operationally, exploitation aligns with the MITRE ATT&CK technique NTDS (T1003.003); ranked at the 39th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog; a public proof-of-concept is referenced.
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2023-43896
Vulnerability Data
Race Condition within a Thread in GitHub repository it-novum/openitcockpit prior to 4.6.5.
- CWE(s)
Related Threats
MITRE ATT&CK Enterprise Techniques
CVEs Like This One
Affected Assets
Mitigating Controls
Control response
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V15.4.2V15.4.3V17.2.6
Mitigating Controls (NIST CSF 2.0) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.
Secure SDLC practices directly require synchronization primitives and concurrency analysis that prevent intra-thread race conditions.
Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.
A.8.25 mandates secure SDLC practices (secure coding guidelines, security requirements, checkpoints, testing including code scans/penetration tests, and developer training) that reach race conditions in multithreaded code, but leaves a bounded remainder where implementation is incomplete or the specific synchronization flaw slips past the chosen methodology and tests.
A.8.26 only requires that race-condition-relevant requirements (e.g. thread safety, synchronization) be identified during requirements gathering; it performs no enforcement, design, or implementation act that stops the CWE-366 condition from being exploitable when present.
Secure architecture principles address concurrent access and resource synchronization.
Secure coding standards directly require proper synchronization primitives to prevent race conditions.
Security testing can detect race conditions through concurrency and stress testing.