Cyber Resilience

CVE-2023-33877

Memory Safety in Intel Realsense 450 Fa Firmware ≤ 0.25.0

Published
11 August 2023
Modified
21 November 2024
Patch / advisory
CVSS Score v3.1 3.3
Click a component to see what it means
Raw vectorCVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:L/A:N
EPSS Score 0.0018 8th percentile
Risk Priority 15 floored blend · peak EPSS

Summary

CVE-2023-33877 is a low-severity Out-of-bounds Write (CWE-787) vulnerability in Intel Realsense 450 Fa Firmware. Its CVSS base score is 3.3 (Low).

Operationally, ranked at the 8th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

EU & UK References

Vulnerability Data

Out-of-bounds write in some Intel(R) RealSense(TM) ID software for Intel(R) RealSense(TM) 450 FA in version 0.25.0 may allow an authenticated user to potentially enable escalation of privilege via local access.

CWE(s)

Related Threats

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Affected Assets

intel
realsense 450 fa firmware
≤ 0.25.0

Mitigating Controls

Likely Mitigating Controls AI

Per-CVE control mapping for this CVE has not run yet; the list below is derived from the weakness types (CWEs) cited in the NVD entry.

addresses: CWE-787

Out-of-bounds writes that corrupt control flow or inject shellcode are rendered non-executable by the same memory protections.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure-development practices (static analysis, bounds checking, code review) are the primary means of preventing out-of-bounds writes.

ID.RA-01 partial match
prevents

Vulnerability scanning and recording can discover out-of-bounds write flaws so they can be remediated.

PR.PS-02 partial match
prevents

Patching or replacing vulnerable software directly eliminates known instances of this coding weakness.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

detects

Security testing in development and acceptance can detect and prevent out-of-bounds write defects.

prevents

Secure development life cycle mandates practices that prevent out-of-bounds writes.

prevents

Application security requirements can specify bounds-checking and safe memory handling.

prevents

Secure architecture and engineering principles reduce the likelihood of buffer overflows.

prevents

Secure coding directly addresses out-of-bounds writes through language choice and coding standards.

prevents

Change management can enforce review gates that catch unsafe memory operations before deployment.

References