Cyber Resilience

CVE-2024-0762

Memory Safety in Phoenixtech Securecore Technology 4.0.1.1 – 4.0.1.998

Public PoCMemory Safety
Published
14 May 2024
Modified
29 September 2025
Patch / advisory
View advisory
CVSS Score v3.1 7.5
Click a component to see what it means
Raw vectorCVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H
EPSS Score 0.0076 52th percentile
Risk Priority 53 floored blend · peak EPSS

Summary

CVE-2024-0762 is a high-severity Classic Buffer Overflow (CWE-120) vulnerability in Phoenixtech Securecore Technology. Its CVSS base score is 7.5 (High).

Operationally, exploitation aligns with the MITRE ATT&CK technique Exploitation for Privilege Escalation (T1068); ranked in the top 48% of CVEs by exploit likelihood; it is not currently listed in the CISA KEV catalog; a public proof-of-concept is referenced.

The strongest mitigations our analysis identified map to SA-11 (Developer Testing and Evaluation) and SI-10 (Information Input Validation) — see the control section below for these in your framework.

EU & UK References

Vulnerability Data

Potential buffer overflow in unsafe UEFI variable handling in Phoenix SecureCore™ for select Intel platforms This issue affects: Phoenix SecureCore™ for Intel Kaby Lake: from 4.0.1.1 before 4.0.1.998; Phoenix SecureCore™ for Intel Coffee Lake: from 4.1.0.1 before 4.1.0.562; Phoenix SecureCore™…

more

for Intel Ice Lake: from 4.2.0.1 before 4.2.0.323; Phoenix SecureCore™ for Intel Comet Lake: from 4.2.1.1 before 4.2.1.287; Phoenix SecureCore™ for Intel Tiger Lake: from 4.3.0.1 before 4.3.0.236; Phoenix SecureCore™ for Intel Jasper Lake: from 4.3.1.1 before 4.3.1.184; Phoenix SecureCore™ for Intel Alder Lake: from 4.4.0.1 before 4.4.0.269; Phoenix SecureCore™ for Intel Raptor Lake: from 4.5.0.1 before 4.5.0.218; Phoenix SecureCore™ for Intel Meteor Lake: from 4.5.1.1 before 4.5.1.15.

CWE(s)
CWE-120

Related Threats

MITRE ATT&CK Enterprise Techniques

T1068 Exploitation for Privilege Escalation Privilege Escalation
Adversaries may exploit software vulnerabilities in an attempt to elevate privileges.
attack.mitre.org →
T1190 Exploit Public-Facing Application Initial Access
Adversaries may attempt to exploit a weakness in an Internet-facing host or system to initially access a network.
attack.mitre.org →
T1203 Exploitation for Client Execution Execution
Adversaries may exploit software vulnerabilities in client applications to execute code.
attack.mitre.org →
T1210 Exploitation of Remote Services Lateral Movement
Adversaries may exploit remote services to gain unauthorized access to internal systems once inside of a network.
attack.mitre.org →
T1212 Exploitation for Credential Access Credential Access
Adversaries may exploit software vulnerabilities in an attempt to collect credentials.
attack.mitre.org →
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2025-24519Same vendor: Intel
CVE-2025-32732Same vendor: Intel
CVE-2026-20782Same vendor: Intel
CVE-2023-22661Same vendor: Intel
CVE-2024-29980Same product: Intel Celeron 3865U
CVE-2024-29979Same product: Intel Celeron 3865U
CVE-2024-1598Same product: Phoenixtech Securecore Technology
CVE-2023-28741Same vendor: Intel
CVE-2023-25756Same product: Intel Celeron 3865U
CVE-2025-25900Shared CWE-120

Affected Assets

phoenixtech
securecore technology
4.0.1.1 — 4.0.1.998 · 4.1.0.1 — 4.1.0.562 · 4.2.0.1 — 4.2.0.323

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

—

Detect
Catch it (NIST detect / respond)

—

Harden
Shrink the surface (DISA STIG)

—

Validate
Prove the fix (OWASP ASVS)
  • V5.2.1

Mitigating Controls (NIST 800-53 r5) AI

SA-11 Developer Testing and Evaluation good match

Developer testing and analysis can find missing size checks before deployment.

SI-10 Information Input Validation good match

Input validation directly enforces size checks before buffer copies.

SA-8 Security and Privacy Engineering Principles partial match

Engineering principles require bounds checking and safe buffer handling in design.

SI-16 Memory Protection partial match

Memory protection limits the impact of an overflow once it occurs.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure development practices directly enforce bounds checking and input validation that prevent classic buffer overflows.

ID.RA-01 partial match
prevents

Vulnerability identification processes such as code review or scanning detect classic buffer overflows before exploitation.

PR.PS-02 partial match
prevents

Routine patching replaces vulnerable code containing unchecked buffer copies with corrected versions.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

A.8.28 Secure coding mostly match
prevents

Secure coding directly requires bounds-checked memory operations, addressing the root cause of CWE-120.

A.8.29 Security testing in development and acceptance mostly match
finds

Security testing in development and acceptance can detect buffer overflows through fuzzing and static analysis, though it does not prevent them at the source.

A.8.25 Secure development life cycle partial match
prevents

Secure development life cycle mandates processes that can include input validation and bounds checking to prevent buffer overflows.

A.8.26 Application security requirements partial match
prevents

Application security requirements can specify input-size validation and safe buffer handling to mitigate classic buffer overflows.

A.8.27 Secure system architecture and engineering principles partial match
prevents

Secure system architecture and engineering principles promote defensive coding patterns that reduce the likelihood of unchecked buffer copies.

References