Raw vector
CVSS:3.1/AV:N/AC:H/PR:H/UI:R/S:U/C:N/I:L/A:LCVSS and EPSS are reproduced from their sources (NVD, FIRST EPSS). Risk Priority is our own derived reading, not an NVD score.
Summary
CVE-2024-2032 is a low-severity Race Condition within a Thread (CWE-366) vulnerability in Zenml Zenml. Its CVSS base score is 3.1 (Low).
Operationally, exploitation aligns with the MITRE ATT&CK technique NTDS (T1003.003); ranked at the 20th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.
This vulnerability is AI-related — categorised as Other AI Platforms; in the Other ATLAS/OWASP Terms risk domain.
The strongest mitigations our analysis identified map to SA-11 (Developer Testing and Evaluation) and SA-15 (Development Process, Standards, and Tools) — see the control section below for these in your framework.
OWASP Top 10 for Web (2025)
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2024-0193
Vulnerability Data
A race condition vulnerability exists in zenml-io/zenml versions up to and including 0.55.3, which allows for the creation of multiple users with the same username when requests are sent in parallel. This issue was fixed in version 0.55.5. The vulnerability…
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arises due to insufficient handling of concurrent user creation requests, leading to data inconsistencies and potential authentication problems. Specifically, concurrent processes may overwrite or corrupt user data, complicating user identification and posing security risks. This issue is particularly concerning for APIs that rely on usernames as input parameters, such as PUT /api/v1/users/test_race, where it could lead to further complications.
- CWE(s)
AI Security AnalysisAI
- AI Category
- Other AI Platforms
- Risk Domain
- Other ATLAS/OWASP Terms
- OWASP Top 10 for LLMs 2025
- None mapped
- Classification Reason
- ZenML is an open-source MLOps framework for building, deploying, and managing machine learning pipelines, fitting under 'Other Platforms' as it is a platform for ML workflows rather than specific libraries or frameworks like deep learning or NLP tools.
Related Threats
MITRE ATT&CK Enterprise Techniques
CVEs Like This One
Affected Assets
Mitigating Controls
Control response
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V15.4.2V15.4.3V17.2.6
Mitigating Controls (NIST 800-53 r5) AI
Developer testing and evaluation can include concurrency and stress testing that finds race conditions after they have been coded.
Requiring documented development standards and tools can mandate use of safe concurrency patterns that avoid introducing races.
Security engineering principles include requirements for synchronization primitives and thread-safe design that stop race conditions from being introduced.
Maintaining separate execution domains for each process structurally eliminates unintended concurrent access to the same shared resources.
Preventing unintended information transfer through shared system resources directly addresses the improper concurrent modification that defines a race condition.
Mitigating Controls (NIST CSF 2.0) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.
Secure SDLC practices directly require synchronization primitives and concurrency analysis that prevent intra-thread race conditions.
Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.
A.8.25 mandates secure SDLC practices (secure coding guidelines, security requirements, checkpoints, testing including code scans/penetration tests, and developer training) that reach race conditions in multithreaded code, but leaves a bounded remainder where implementation is incomplete or the specific synchronization flaw slips past the chosen methodology and tests.
A.8.26 only requires that race-condition-relevant requirements (e.g. thread safety, synchronization) be identified during requirements gathering; it performs no enforcement, design, or implementation act that stops the CWE-366 condition from being exploitable when present.
Secure architecture principles address concurrent access and resource synchronization.
Secure coding standards directly require proper synchronization primitives to prevent race conditions.
Security testing can detect race conditions through concurrency and stress testing.
Hardening callouts derived
DISA STIG baselines are authored against specific weaknesses. Where this CVE cites a broad weakness class, the mapping is not asserted at that abstraction (owner ruling, 2026-09-25: grade only at Base and below), so no rule is shown here rather than a rule shown against the wrong grain.
- No fine-grained STIG row for CWE-362, a class-level weakness, and none of its children carries one either.