Cyber Resilience

CVE-2025-27243

Memory Safety in Intel Ethernet Controller ≤ 30.3

Published
10 February 2026
Modified
17 March 2026
Patch / advisory
CVSS Score v4 6.7
Click a component to see what it means
Raw vectorCVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
EPSS Score 0.0011 2th percentile
Risk Priority 35 floored blend · peak EPSS

Summary

CVE-2025-27243 is a medium-severity Out-of-bounds Write (CWE-787) vulnerability in Intel Ethernet Controller. Its CVSS base score is 6.7 (Medium).

Operationally, ranked at the 2th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SI-2 (Flaw Remediation) and SI-7 (Software, Firmware, and Information Integrity) — see the control section below for these in your framework.

EU & UK References

Vulnerability Data

Out-of-bounds write in the firmware for some Intel(R) Ethernet Controller E810 before version cvl fw 1.7.8.x within Ring 0: Bare Metal OS may allow a denial of service. System software adversary with a privileged user combined with a low complexity…

more

attack may enable denial of service. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.

CWE(s)

Related Threats

CVEs Like This One

CVE-2024-31858Same vendor: Intel
CVE-2024-23497Same vendor: Intel
CVE-2023-22327Same vendor: Intel
CVE-2023-22442Same vendor: Intel
CVE-2023-23910Same vendor: Intel
CVE-2023-33877Same vendor: Intel
CVE-2023-28488Same vendor: Intel
CVE-2023-30763Same vendor: Intel
CVE-2023-23580Same vendor: Intel
CVE-2023-34351Same vendor: Intel

Affected Assets

intel
ethernet controller
≤ 30.3

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)
  • SI-7 Software, Firmware, and Information Integrity
  • SI-2 Flaw Remediation
  • AC-6 Least Privilege
Detect
Catch it (NIST detect / respond)

Harden
Shrink the surface (DISA STIG)

Validate
Prove the fix (OWASP ASVS)

Mitigating Controls (NIST 800-53 r5) AI

prevent

Directly requires verification of firmware integrity to detect or block the out-of-bounds write before it can be exploited in the E810 controller.

prevent

Mandates timely application of the cvl fw 1.7.8.x patch that eliminates the CWE-787 flaw in Ring 0 firmware.

prevent

Restricts the privileged local accounts required to reach the vulnerable firmware path, reducing the attack surface for the DoS condition.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure-development practices (static analysis, bounds checking, code review) are the primary means of preventing out-of-bounds writes.

ID.RA-01 partial match
prevents

Vulnerability scanning and recording can discover out-of-bounds write flaws so they can be remediated.

PR.PS-02 partial match
prevents

Patching or replacing vulnerable software directly eliminates known instances of this coding weakness.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

detects

Security testing in development and acceptance can detect and prevent out-of-bounds write defects.

prevents

Secure development life cycle mandates practices that prevent out-of-bounds writes.

prevents

Application security requirements can specify bounds-checking and safe memory handling.

prevents

Secure architecture and engineering principles reduce the likelihood of buffer overflows.

prevents

Secure coding directly addresses out-of-bounds writes through language choice and coding standards.

prevents

Change management can enforce review gates that catch unsafe memory operations before deployment.

References