CVE-2022-24436
Published: 15 June 2022
Summary
CVE-2022-24436 is a medium-severity Observable Discrepancy (CWE-203) vulnerability in Intel *. Its CVSS base score is 6.5 (Medium).
Operationally, ranked in the top 5.3% of CVEs by exploit likelihood; it is not currently listed in the CISA KEV catalog.
Deeper analysis
CVE-2022-24436 is an observable-behavior issue in power-management throttling on certain Intel processors, tracked under CWE-203. The flaw permits side-channel leakage that can disclose sensitive information when the processor's throttling behavior is monitored over a network.
An authenticated user with low privileges can exploit the vulnerability remotely without user interaction. Successful attacks yield high confidentiality impact while leaving integrity and availability unaffected, consistent with the CVSS 6.5 rating that reflects network attack vector and low complexity.
Intel's advisory SA-00698 and the associated NetApp bulletins describe the affected processor families and direct customers to firmware or microcode updates that alter throttling behavior to reduce observability.
EPSS scores for the CVE rose from a low baseline to a recorded peak of 0.1895, indicating measurable post-disclosure exploitation interest before settling at the current value of 0.1487.
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2022-29324
Vulnerability details
Observable behavioral in power management throttling for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via network access.
- CWE(s)
Related Threats
No named actor attribution yet. ATT&CK technique mapping in progress for this CVE.
Affected Assets
Mitigating Controls
Likely Mitigating Controls AI
Per-CVE control mapping for this CVE has not run yet; the list below is derived from the weakness types (CWEs) cited in the NVD entry.
Misdirection can normalize or falsify responses to eliminate observable discrepancies that aid reconnaissance.
Observable discrepancies in system behavior can be modulated to create covert storage or timing channels; the required analysis detects and constrains such avenues.
Prevents attackers from using observable differences in error responses to infer internal system details or state.