Cyber Resilience

CVE-2023-1424

Memory Safety in Mitsubishielectric Melsec Iq-Fx5U-32Mr\/Ds Firmware

Published
24 May 2023
Modified
21 November 2024
Patch / advisory
CVSS Score v3.1 10.0
Click a component to see what it means
Raw vectorCVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:C/C:H/I:H/A:H
EPSS Score 0.034 88th percentile
Risk Priority 80 floored blend · peak EPSS

Summary

CVE-2023-1424 is a critical-severity Classic Buffer Overflow (CWE-120) vulnerability in Mitsubishielectric Melsec Iq-Fx5U-32Mr\/Ds Firmware. Its CVSS base score is 10.0 (Critical).

Operationally, exploitation aligns with the MITRE ATT&CK technique Exploitation for Privilege Escalation (T1068); ranked in the top 12% of CVEs by exploit likelihood; it is not currently listed in the CISA KEV catalog.

Deeper analysis AI-assisted summary

Synthesised by an AI model from the NVD description and linked references — a reading aid, not an authoritative source.

CVE-2023-1424 is a classic buffer overflow vulnerability (CWE-120) affecting Mitsubishi Electric MELSEC iQ-F Series and MELSEC iQ-R Series CPU modules. The flaw permits a remote attacker to send specially crafted packets that trigger memory corruption, leading to either a denial-of-service condition or arbitrary code execution on the target device. Recovery from a DoS state requires a manual system reset of the affected module.

An unauthenticated attacker with network access can exploit the issue without user interaction or credentials, achieving either persistent disruption or full control over the PLC. The vulnerability carries a CVSS 3.1 base score of 10.0, reflecting its network-exposable nature and the high impact on confidentiality, integrity, and availability within an industrial control system context.

Vendor and government advisories, including Mitsubishi Electric’s security bulletin 2023-003 and CISA ICSA-23-143-03, provide mitigation guidance and are available at the referenced URLs. The EPSS score rose from a low baseline to a peak of 0.0500 on 2025-01-22 before receding to its current value of 0.0276, indicating a measurable increase in observed exploitation interest well after initial disclosure.

EU & UK References

Vulnerability Data

Buffer Copy without Checking Size of Input ('Classic Buffer Overflow') vulnerability in Mitsubishi Electric Corporation MELSEC iQ-F Series CPU modules and MELSEC iQ-R Series CPU modules allows a remote unauthenticated attacker to cause a denial of service (DoS) condition or…

more

execute malicious code on a target product by sending specially crafted packets. A system reset of the product is required for recovery from a denial of service (DoS) condition and malicious code execution.

CWE(s)

Related Threats

MITRE ATT&CK Enterprise Techniques

T1068 Exploitation for Privilege Escalation Privilege Escalation
Adversaries may exploit software vulnerabilities in an attempt to elevate privileges.
T1190 Exploit Public-Facing Application Initial Access
Adversaries may attempt to exploit a weakness in an Internet-facing host or system to initially access a network.
T1203 Exploitation for Client Execution Execution
Adversaries may exploit software vulnerabilities in client applications to execute code.
T1210 Exploitation of Remote Services Lateral Movement
Adversaries may exploit remote services to gain unauthorized access to internal systems once inside of a network.
T1212 Exploitation for Credential Access Credential Access
Adversaries may exploit software vulnerabilities in an attempt to collect credentials.
Derived from this CVE’s CWE(s) via the direct CWE→ATT&CK cross-walk.

CVEs Like This One

CVE-2023-3346Same vendor: Mitsubishielectric
CVE-2023-5275Same vendor: Mitsubishielectric
CVE-2023-5274Same vendor: Mitsubishielectric
CVE-2025-25900Shared CWE-120
CVE-2026-30006Shared CWE-120
CVE-2026-43807Shared CWE-120
CVE-2025-45058Shared CWE-120
CVE-2024-7157Shared CWE-120
CVE-2025-52863Shared CWE-120
CVE-2023-27061Shared CWE-120

Affected Assets

mitsubishielectric
melsec iq-fx5u-32mr\/ds firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mr\/dss firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mr\/es firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mr\/ess firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mt\/ds firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mt\/dss firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mt\/es firmware
all versions
mitsubishielectric
melsec iq-fx5u-32mt\/ess firmware
all versions
mitsubishielectric
melsec iq-fx5u-64mr\/ds firmware
all versions
mitsubishielectric
melsec iq-fx5u-64mr\/dss firmware
all versions
+29 more product configuration(s) — see NVD for full list

Mitigating Controls

Control response

Prevent
Stop it (NIST 800-53)

Detect
Catch it (NIST detect / respond)

Harden
Shrink the surface (DISA STIG)

Validate
Prove the fix (OWASP ASVS)
  • V5.2.1

Likely Mitigating Controls AI

Per-CVE control mapping for this CVE has not run yet; the list below is derived from the weakness types (CWEs) cited in the NVD entry.

addresses: CWE-120

Platform-independent managed code eliminates the need for unchecked native buffer copies that are the root cause of classic buffer overflows.

Mitigating Controls (NIST CSF 2.0) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.

PR.PS-06 mostly match
prevents

Secure development practices directly enforce bounds checking and input validation that prevent classic buffer overflows.

ID.RA-01 partial match
prevents

Vulnerability identification processes such as code review or scanning detect classic buffer overflows before exploitation.

PR.PS-02 partial match
prevents

Routine patching replaces vulnerable code containing unchecked buffer copies with corrected versions.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

prevents

Secure coding directly requires bounds-checked memory operations, addressing the root cause of CWE-120.

finds

Security testing in development and acceptance can detect buffer overflows through fuzzing and static analysis, though it does not prevent them at the source.

prevents

Secure development life cycle mandates processes that can include input validation and bounds checking to prevent buffer overflows.

prevents

Application security requirements can specify input-size validation and safe buffer handling to mitigate classic buffer overflows.

prevents

Secure system architecture and engineering principles promote defensive coding patterns that reduce the likelihood of unchecked buffer copies.

References