Security Resilience

CVE-2023-31347

Amd Epyc 7773X Firmware ≤ milanpi_1.0.0.c

Published
13 February 2024
Modified
17 March 2025
CVSS Score v3.1 4.9
Click a component to see what it means
Raw vectorCVSS:3.1/AV:N/AC:L/PR:H/UI:N/S:U/C:N/I:H/A:N
EPSS Score 0.0046 38th percentile
Risk Priority 39 floored blend · peak EPSS

CVSS and EPSS are reproduced from their sources (NVD, FIRST EPSS). Risk Priority is our own derived reading, not an NVD score.

Summary

CVE-2023-31347 is a medium-severity Incorrect Calculation (CWE-682) vulnerability in Amd Epyc 72F3. Its CVSS base score is 4.9 (Medium).

Operationally, ranked at the 38th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SA-11 (Developer Testing and Evaluation) and SA-15 (Development Process, Standards, and Tools) — see the control section below for these in your framework.

EU & UK References

Vulnerability Data

Due to a code bug in Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a guest to observe an incorrect TSC when Secure TSC is enabled potentially resulting in a loss of guest integrity.  

CWE(s)

Related Threats

CVEs Like This One

CVE-2023-31346Same product: Amd Epyc 7203 Firmware
CVE-2023-20573Same product: Amd Epyc 7203 Firmware
CVE-2023-20591Same product: Amd Epyc 7203 Firmware
CVE-2023-20566Same product: Amd Epyc 7203 Firmware
CVE-2023-20584Same product: Amd Epyc 7203 Firmware
CVE-2024-21978Same product: Amd Epyc 7203 Firmware
CVE-2023-31355Same product: Amd Epyc 7203 Firmware
CVE-2024-21980Same product: Amd Epyc 7203 Firmware
CVE-2023-20578Same product: Amd Epyc 7203 Firmware
CVE-2023-20575Same product: Amd Epyc 72F3

Affected Assets

amd
epyc 7773x firmware
≤ milanpi_1.0.0.c
amd
epyc 7763 firmware
≤ milanpi_1.0.0.c
amd
epyc 7713 firmware
≤ milanpi_1.0.0.c
amd
epyc 7713p firmware
all versions
amd
epyc 7663 firmware
≤ milanpi_1.0.0.c
amd
epyc 7663p firmware
≤ milanpi_1.0.0.c
amd
epyc 7643 firmware
≤ milanpi_1.0.0.c
amd
epyc 7643p firmware
≤ milanpi_1.0.0.c
amd
epyc 7573x firmware
≤ milanpi_1.0.0.c
amd
epyc 75f3 firmware
≤ milanpi_1.0.0.c
+52 more product configuration(s) — see NVD for full list

Mitigating Controls

Mitigating Controls (NIST 800-53 r5) AI

Developer testing and evaluation directly exercises calculations and can discover incorrect or unintended results used in security decisions.

Requiring documented development processes and standards can enforce coding rules and tool usage that reduce introduction of calculation errors.

Engineering principles applied during design and implementation can require verified algorithms and safe arithmetic that structurally avoid incorrect calculation results.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

blocks

Secure development lifecycle mandates verification steps that catch incorrect calculations before they reach production.

blocks

A.8.26 requires that security requirements (including resilience against attacks such as buffer overflows or SQL injection) be identified during development or acquisition; it does not itself enforce correct calculations or stop an arithmetic error from being introduced or exploited.

removes

A.8.27 mandates establishing and applying secure engineering principles (including secure-by-design, least privilege, and design reviews) but does not itself remove or rewrite an incorrect calculation already present in first-party code; that is a code defect class reached only by testing or remediation controls per the locus rule.

prevents

Secure coding standards directly prohibit unsafe arithmetic and require defensive checks against incorrect results.

finds

Security testing in development and acceptance can detect calculation flaws before deployment.

Hardening callouts derived

DISA STIG baselines are authored against specific weaknesses. Where this CVE cites a broad weakness class, the mapping is not asserted at that abstraction (owner ruling, 2026-09-25: grade only at Base and below), so no rule is shown here rather than a rule shown against the wrong grain.

  • No fine-grained STIG row for CWE-682, a pillar-level weakness, and none of its children carries one either.

References