CVE-2025-9709
Raw vector
CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:P/AU:X/R:X/V:X/RE:X/U:XSummary
CVE-2025-9709 is a high-severity On-Chip Debug and Test Interface With Improper Access Control (CWE-1191) vulnerability in Raelize (inferred from references). Its CVSS base score is 8.6 (High).
Operationally, exploitation aligns with the MITRE ATT&CK technique OS Credential Dumping (T1003); ranked at the 14th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.
The strongest mitigations our analysis identified map to AC-3 (Access Enforcement) and AC-6 (Least Privilege) — see the control section below for these in your framework.
EU & UK References
- 🇪🇺 ENISA EUVD: EUVD-2025-27018
Vulnerability Data
On-Chip Debug and Test Interface With Improper Access Control and Improper Protection against Electromagnetic Fault Injection (EM-FI) in Nordic Semiconductor nRF52810 allow attacker to perform EM Fault Injection and bypass APPROTECT at runtime, requiring the least amount of modification to…
more
the hardware system possible.
- CWE(s)
Related Threats
MITRE ATT&CK Enterprise Techniques
CVEs Like This One
Affected Assets
Mitigating Controls
Mitigating Controls (NIST 800-53 r5) AI
AC-3 directly requires enforcement of authorization checks on all logical access paths, which would block unauthorized use of the debug/test interface registers.
AC-6 requires restricting access rights to the minimum needed, limiting what an attacker reaching the debug interface can actually read or modify.
IA-3 requires device identification and authentication before any connection is established, which would apply to external debug or test equipment.
Tamper-resistance requirements directly drive hardware protections that block EM fault injection from reaching internal state or bypassing checks.
Mandating a tamper-protection program for components forces implementation of EM-FI countermeasures during development and supply-chain handling.
Mitigating Controls (NIST CSF 2.0) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→CSF cross-walk (authority under review) — links open the control.
Defining and enforcing access permissions directly addresses improper authorization to debug interfaces.
Managing physical access to assets covers control of on-chip debug/test ports and pins.
Physical-environment monitoring can detect EM-FI attempts or related tampering.
Authentication of hardware can help restrict debug interface use but is narrower than full access control.
Protecting assets from environmental threats encompasses electromagnetic fault-injection vectors.
Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI
Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.
Security testing can discover improper debug access but does not itself implement the control.
Physical perimeters can limit access to debug ports but do not address on-chip access-control logic.
Physical entry controls reduce the chance of an attacker reaching the chip but do not enforce on-chip debug authorization.
Physical and environmental threat protection directly addresses EM-FI risk through shielding and environmental controls.
Equipment siting and protection can reduce exposure to EM sources but does not specifically target fault-injection vectors.
Privileged-access rules may extend to hardware debug interfaces, yet the control is not hardware-specific.