CWE · MITRE source
CWE-1262Improper Access Control for Register Interface
The product uses memory-mapped I/O registers that act as an interface to hardware functionality from software, but there is improper access control to those registers.
Software commonly accesses peripherals in a System-on-Chip (SoC) or other device through a memory-mapped register interface. Malicious software could tamper with any security-critical hardware data that is accessible directly or indirectly through the register interface, which could lead to a loss of confidentiality and integrity.
Last updated: 20 August 2026 13:14 UTC
Cumulative inbound coverage
How completely the frameworks we cross-walk collectively cover this — the verdict is the strongest single mapping (overlapping partials are not summed); breadth shows the corroboration behind it.
Collective: mostly · 1 mapping(s) from 1 framework(s): CAPEC 1 (mostly)
Control responseHuman-reviewed
Answering this weakness across the control lifecycle, from our framework cross-walks.
NIST 800-53 r5 controls that address this weakness (0)AI-assisted
| Control | Title | Family | Why it addresses this CWE |
|---|---|---|---|
| No NIST controls proposed yet. | |||
Top CVEs of this weakness type, ranked by Risk Priority
| CVE | Risk | CVSS | EPSS | Published |
|---|---|---|---|---|
CVE-2022-23005 UPD | 6.4 | 8.7 | 0.0082 | 2023-01-23 |
CVE-2015-8325 UPD | 5.9 | 7.8 | 0.0060 | 2016-05-01 |
CVE-2024-6354 UPD | 5.6 | 7.2 | 0.0079 | 2024-06-26 |
CVE-2023-20599 UPD | 5.4 | 7.9 | 0.0016 | 2025-06-10 |
CVE-2025-47385 | 5.4 | 7.8 | 0.0007 | 2026-03-02 |
CVE-2024-45556 UPD | 4.5 | 6.5 | 0.0009 | 2025-04-07 |
CVE-2024-57492 UPD | 4.2 | 5.5 | 0.0019 | 2025-03-10 |
CVE-2025-1882 | 3.9 | 5.0 | 0.0020 | 2025-03-03 |
CVE-2025-20788 | 3.3 | 4.4 | 0.0007 | 2025-12-02 |
CVE-2025-36194 UPD | 2.3 | 2.8 | 0.0011 | 2026-02-02 |