Security Resilience

CVE-2023-49618

Memory Safety

Published
12 February 2025
Modified
15 April 2026
CVSS Score v4 8.7
Click a component to see what it means
Raw vectorCVSS:4.0/AV:L/AC:L/AT:P/PR:H/UI:N/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
EPSS Score 0.0021 10th percentile
Risk Priority 27 floored blend · peak EPSS

CVSS and EPSS are reproduced from their sources (NVD, FIRST EPSS). Risk Priority is our own derived reading, not an NVD score.

Summary

CVE-2023-49618 is a high-severity Improper Restriction of Operations within the Bounds of a Memory Buffer (CWE-119) vulnerability in Intel (inferred from references). Its CVSS base score is 8.7 (High).

Operationally, ranked at the 10th percentile by exploit likelihood (below the median); it is not currently listed in the CISA KEV catalog.

The strongest mitigations our analysis identified map to SA-8 (Security and Privacy Engineering Principles) and SI-10 (Information Input Validation) — see the control section below for these in your framework.

Deeper analysis AI-assisted summary

Synthesised by an AI model from the NVD description and linked references — a reading aid, not an authoritative source.

CVE-2023-49618 involves improper buffer restrictions (CWE-119) in some Intel(R) System Security Report and System Resources Defense firmware. This vulnerability may allow a privileged user to potentially enable escalation of privilege via local access. It carries a CVSS v3.1 base score of 7.5, reflecting attack vector (AV:L), high attack complexity (AC:H), high privileges required (PR:H), no user interaction (UI:N), changed scope (S:C), and high impacts on confidentiality, integrity, and availability (C:H/I:H/A:H).

A privileged user with local access can exploit this vulnerability, though it requires high attack complexity. Successful exploitation could enable escalation of privilege, potentially leading to high-impact disruption across confidentiality, integrity, and availability with scope expansion beyond the vulnerable component.

Intel has issued security advisory INTEL-SA-01203 addressing this issue, available at https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01203.html, which provides details on affected products and mitigation steps.

EU & UK References

Vulnerability Data

Improper buffer restrictions in some Intel(R) System Security Report and System Resources Defense firmware may allow a privileged user to potentially enable escalation of privilege via local access.

CWE(s)

Related Threats

CVEs Like This One

CVE-2025-2357Shared CWE-119
CVE-2025-7318Shared CWE-119
CVE-2026-43673Shared CWE-119
CVE-2025-7239Shared CWE-119
CVE-2026-16393Shared CWE-119
CVE-2026-7324Shared CWE-119
CVE-2025-29492Shared CWE-119
CVE-2024-9684Shared CWE-119
CVE-2023-4494Shared CWE-119
CVE-2026-12300Shared CWE-119

Affected Assets

Intel
—
inferred from references and description; NVD did not file a CPE for this CVE

Mitigating Controls

Mitigating Controls (NIST 800-53 r5) AI

Secure engineering principles require memory-safe design and coding that structurally avoids buffer-boundary violations.

Input validation directly enforces bounds checking that stops out-of-bounds reads/writes from being introduced or reached.

Memory protection restricts exploitation impact of buffer overflows without eliminating the underlying coding flaw.

Mitigating Controls (ISO/IEC 27001:2022 Annex A) AI

Derived directly from the weakness types (CWEs) cited in the NVD entry via our AI-authored CWE→ISO cross-walk (authority under review) — links open the control.

blocks

A.8.25 mandates secure SDLC practices (secure coding guidelines, security requirements, testing including code scans and penetration tests, developer training) that reach buffer management and can stop many buffer overruns from reaching production, but leaves a bounded remainder (e.g. flaws in non-software components, incomplete enforcement of guidelines, or post-deployment changes)

blocks

Application security requirements can specify memory-safety rules, but do not prescribe implementation details.

blocks

A.8.27 mandates security-by-design principles (e.g. least privilege, fail securely, distrust external input, hardening) plus design reviews that can catch and stop buffer-boundary errors before they reach code, but this is only one minority slice of CWE-119's broad surface (language-specific flaws, unsafe library use, compiler/runtime mitigations, and post-deployment instances remain outside its direct scope).

prevents

Secure coding standards explicitly forbid unsafe buffer operations, directly eliminating CWE-119.

finds

Security testing in development catches out-of-bounds accesses before release, covering most instances of the weakness.

Hardening callouts derived

DISA STIG baselines are authored against specific weaknesses. Where this CVE cites a broad weakness class, the mapping is not asserted at that abstraction (owner ruling, 2026-09-25: grade only at Base and below), so no rule is shown here rather than a rule shown against the wrong grain.

  • No fine-grained STIG row for CWE-119, a class-level weakness. Rules are authored against its narrower children: CWE-823.

References